Johannes Grad of Cadence First Si2 Pinnacle Award Winner

Johannes Grad, product engineer at Cadence Design Systems, is the winner of the first quarterly Pinnacle Award, presented to volunteers for exceptional contributions to Si2’s success as an R&D joint venture.

A member of the Cadence Custom IC and PCS Group, Johannes focuses on OpenAccess development, supporting advanced process nodes, and software infrastructure for physical design. He is a moderator for the Si2 OpenAccess Issue Tracking System and Discussion Forum and a member of the Si2 OA Debug Working Group. Johannes has Ph.D. in Electrical Engineering from the Illinois Institute of Technology.

Marshall Tiner, director of Production Standards, said that “Johannes’ behind-the-scenes efforts are uniquely representative of the great work done by volunteers to assure OpenAccess remains the industry’s leading design databaseAs an essential member of the Discussion Forum, whether he’s responding to a user error or lack of product knowledge, Johannes handles every problem with professionalism and tact.  He has shown unwavering support for all members of the OpenAccess Coalition.” 

Ali Sadigh Joins Si2 Technical Team; Robert Hill Named Client Account Manager

Ali Sadigh

Ali Sadigh, a technical professional with more than 25 years of experience in computational electromagnetics, circuit simulation and industrial data acquisition and management, has joined Silicon Integration Initiative as a principal software design engineer. Si2 also announced that Robert Hill has been named client account manager

Before joining Si2, Sadigh worked with AVEVA Group as part of the Historian high-performance process database. His efforts focused on cloud-based data subscription and other applications based on service-oriented architecture for time-series data storage, retrieval and analytics.

Sadigh began his career at Compact Software, working on the Microwave Explorer simulator. He then joined the IBM EDA group where his contributions were focused on API-driven simulations for timing, noise and power methodologies used in IBM semiconductor design. He then held a position at Cadence Design Systems, performing research and development on the Spectre AMS Designer. Sadigh received a doctorate in electrical engineering from Syracuse University in 1994.

 

Robert Hill

Hill is a senior technology sales professional with over 20 years of solution-selling experience and is the recipient of numerous industry awards and commendations. He has worked as an account executive for Dell, Hewlett Packard Enterprise and IBM, helping customers modernize and transform IT operations. More recently, his focus centered on multi-cloud environments.

John Ellis, Si2 president and CEO, said, “Dr. Sadigh brings valuable industry experience in design and EDA to the table, and adds critical cloud-based application experience which will help Si2 address interoperability issues for silicon-on-cloud design. The addition of Robert, with his background in both technical sales and account management, provides our members with a central point of contact for updates and opportunities about Si2 programs and services.”

 

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. The Si2 international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

 

 

Aparna Dey of Cadence Joins Si2 Board of Directors

Aparna Dey, senior product marketing group director at Cadence Design Systems, has been elected to the Silicon Integration Initiative board of directors. She replaces Stan Krolikoski who served on Si2’s board since 2016.

Dey is responsible for the Cadence electronic design automation and intellectual property standards activities. She also manages the participation, contribution, partnerships and relationships between Cadence and industry standards organizations, associations, and consortiums. She has been at Cadence for over 16 years in various roles in research and development, services and technical marketing.

John Ellis, Si2 president and CEO, said Dey has an “impressive record of achievement in her more than 25 years in the industry that makes her an ideal addition to the Si2 board. Aparna has volunteered on various Si2 committees since 2003 and has earned the respect of our staff and her colleagues. Most notably, she has been involved with and supported our flagship coalition, OpenAccess, since its inception.”

“Si2 has been committed to driving standards interoperability that moves the IC design industry forward, and I’m passionate about working with them to continue this effort, Dey said. “Over the years, I’ve collaborated with Si2 on standards development and participated in various coalitions. I look forward to serving on the Si2 board of directors to foster EDA interoperability and support IC design industry ecosystem growth through standards solutions.”

Before her current role, Dey was responsible for driving ASIC alliance partnerships and critical technology deployments with Cadence’s leading customers. As a senior architect in the Cadence Worldwide Methodology Services Group, she worked on multiple methodology projects on-site in Japan, Taiwan and Germany.

She also worked as an advanced R&D director at Synchronicity and was responsible for their technology strategy, product roadmap and requirements for their next-generation design database and IP management products. She was awarded a US and European patent on their Silicon IP Reuse system.

Dey holds a bachelor’s degree in electronics and telecommunication engineering from Netaji Subhas Institute of Technology, University of Delhi, India.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. The Si2 international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

Si2 Workshop Explores Global Effort to Measure AI Compute Capacity and Infrastructure

An international effort to assess artificial intelligence compute capacity and help governments make informed AI infrastructure investments is the focus of an online workshop hosted by Silicon Integration Initiative, January 29, 8:00-10:00 am PST.

Keith Strier, vice president, Worldwide AI Initiatives at NVIDIA, will discuss the AI Compute Task Force created in early 2020 by the Organisation for Economic Co-operation and Development. The OECD is a Paris-based intergovernmental economic group with 37 member countries, founded in 1961 to stimulate economic progress and world trade. The task force is developing a framework to measure and benchmark domestic AI compute capacity and other AI readiness components, including budgets and investment priorities.

Their work could also address concerns that wealthier countries are making outsized investments in AI compute capacity, possibly leading to a global compute divide that will sustain resource inequalities in a global digital economy. Strier chairs the OECD task force and has primary responsibility for the NVIDIA global public sector portfolio and the AI Nations Partnership Initiative. He also advises national and city government leaders on AI policies and infrastructure.

The workshop also features Yiorgros Makris from the University of Texas at Dallas. He will discuss how machine learning can reduce semiconductor testing costs, increase test quality, improve yield and test floor logistics, and guide designers and process engineers.

Makris is a professor of Electrical and Computer Engineering and co-founder of the NSF Industry-University Cooperative Research Center on Hardware and Embedded System Security. His research focuses on applying machine learning and statistical analysis to develop trusted and reliable integrated circuits and systems, emphasizing the analog/RF domain.

The workshop will conclude with an update on the Si2 AI/ML in EDA Special Interest Group. Speakers are Joydip Das, SIG chair and senior engineer, Samsung Austin R&D Center; and Kerim Kalafala, SIG co-chair and senior technical staff member, IBM EDA.

The workshop is open to the public and registration is free. For more information visit http://bit.ly/si2_ai_workshop.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws. The Si2 international membership includes semiconductor foundries, fabless manufacturers, and EDA companies.

Intel, Microsoft, IBM Technologists Elected to Si2 OpenAccess Coalition Leadership Posts

Raymond Rodriguez, director of Strategic CAD Capabilities at Intel, has been elected to a one-year term as
chair of the Silicon Integration Initiative OpenAccess Coalition board of directors. Ben Bowers, principal
design engineer at Microsoft, was elected OAC vice-chair. Gregory Schaeffer, senior software engineer at IBM,
was reelected as the OpenAccess Change Team co-architect.

The board manages operational decisions for OpenAccess, the world’s most widely used open reference
database for IC design. The Change Team manages OpenAccess API modifications and database implementation.

Marshall Tiner, Si2 director of Production Standards, said “Continuing engagement of industry leaders Intel,
Microsoft and IBM bodes well for the coalition’s ongoing role in advancing semiconductor design.
Ray, Ben, and Gregory each bring years of experience and expertise to the OpenAccess board and Change Team.”

Raymond Rodriguez

A 20-year Intel veteran, Rodriguez directs a team that oversees electronic design automation,
intellectual property, test and measurement, and security assurance supplier engagements.
He has been an OAC board member since 2012. His volunteer industry experience includes
general chair of the IEEE Electronic Design Process Symposium (2019-2021) and executive
committee member of the Design Automation Conference (2015-2017). Rodriguez has a BSEE
from the University of California, Los Angeles, and an MBA, Executive Program, from the
W.P. Carey School of Business, Arizona State University.

 

Ben Bowers

Bowers joined Microsoft in 2018 after 11 years at Qualcomm. He is a technical lead on a
Microsoft custom circuit CAD team that focuses on all aspects of the design flow, including
PDKs, circuit design, and simulation to physical design. He earned a BSEE from Louisiana
State University and an MSEE from Mississippi State University. He also holds 25 patents
in circuit design and methodology.

 

 

Gregory Schaeffer

In his time at IBM, Schaeffer has held various development and leadership roles in
timing/noise/electrical analysis and physical design tools and holds 21 patents in
these areas. He is the architect of IBM’s Microprocessor back-end construction methodology
and has been involved with Si2 initiatives since 2009. Schaeffer earned a BS and
MS in Computer Science from Case Western Reserve University in 2002.

 

 

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard
interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under
the auspices of The National Cooperative Research and Production Act of 1993, the fundamental
law that defines R&D joint ventures and offers them a large measure of protection against federal
antitrust laws. The Si2 international membership includes semiconductor foundries, fabless
manufacturers, and EDA companies.

Dr. Leigh Anne Clevenger Named Si2 Director, OpenStandards

Silicon Integration Initiative has selected Dr. Leigh Anne Clevenger as director of OpenStandards, effective January 1, 2021. She will replace Jerry Frenkil, who has served in this role since 2015. Frenkil will remain with Si2 as an advisor to staff, board, and member companies on adoption of the IEEE 2416 Unified Power Modeling Standard.

Since joining Si2 in 2018, Clevenger has been the lead developer of the Si2 prototype power calculator, demonstrating the UPM/IEEE-2416 standard. She will continue to drive the UPM working group toward its goals of developing and adopting the standard. Additionally, leveraging her doctorate in Software She will continue to drive the UPM working group toward its goals of enhancement and adoption of the standard. and Machine Learning, Clevenger is currently spearheading the effort to identify and solve industry needs in applying artificial intelligence and machine learning to electronic design automation tools.

With this promotion, Clevenger will continue working directly with Si2 members and industry leaders to identify and solve issues in semiconductor design flow interoperability. As an R&D Joint Venture providing antitrust protection for its members, Si2 is uniquely positioned to organize collaborative efforts, with the ultimate goal of widespread adoption of standards providing EDA tool interoperability and customer data access.

“Starting the Special Interest Group on AI/ML in EDA served as Leigh Anne’s introduction to the role Si2 has as an R&D Joint Venture,” said John Ellis, president and CEO. “Through a series of interviews with Si2 member companies, she established a vision of the technical collaboration needed and the highest priority issues for the SIG to tackle.

“Leigh Anne has been a vital addition to our team. She added value to our operations from day one, applying her semiconductor experience to UPM coding. Following Si2’s growth path, we soon put her advanced AI/ML degree to use,” Ellis added. “The SIG she formed with industry experts is well on its way to closing some serious gaps found for effectively applying AI/ML to EDA. I look forward to what’s next for Leigh Anne. With her skills and drive, I expect great things.”

Clevenger, who earned her doctorate at Pace University, has published and presented research on data science including big data analytics, machine learning algorithms, and wearable computing. She brings to Si2 extensive experience in semiconductor design automation at IBM and semiconductor processing technology at GLOBALFOUNDRIES.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Si2 Compact Model Coalition Releases Vital Updates to Industry Workhorse BSIM-Bulk

The Si2 Compact Model Coalition has released important updates to the popular BSIM-Bulk standard, a compact SPICE model developed by researchers at the University of California, Berkeley, and supported by developers at the Indian Institute of Technology Kanpur.

Three years in the making, the latest version of BSIM-Bulk offers improved accuracy, convergence and performance over the previous version and various bug fixes. It also features high-voltage transistor modeling, node collapsing, improved flicker noise modeling, and enhanced tuning flexibility in capacitances.

“The new high voltage model provides a good unified solution to low and medium rating of HV-MOS,” said Kaiman Chan of Texas Instruments, chair of the BSIM-Bulk Working Group. “HV-MOS devices are commonly used in radio frequency power amplifiers, power management integrated circuits, and smart power ICs in consumer and automotive applications. BSIM-Bulk’s latest update enables designers to account for unique device phenomena, which are critical for circuit simulation of high-voltage devices.”

To meet the speed requirements of an evolving industry, the latest version of BSIM-Bulk also offers node collapsing, resulting in faster runtime and reduced simulation and design times for modern billion-transistor systems.

The updates also include a revamped flicker noise model, which is relevant to low-noise analog and radio frequency applications. “As the standard method for small-signal flicker noise does not scale to that of large signals, BSIM-Bulk introduced changes for modeling both small and large signal noise accurately,” said Avirup Dasgupta, post-doctoral developer at the University of California, Berkeley. “BSIM-Bulk updates also provide enhanced tuning flexibility of capacitances, increasing accuracy in AC, transient and RF simulation.”

CMC chair Peter Lee praised the group, saying, “These updates add significant breadth and depth to BSIM-Bulk to ensure the model will continue serving the industry for current and future technology generations. The time savings in circuit simulations alone are impressive and provide a meaningful boost to designers.”

The CMC is a collaborative industry group that standardizes SPICE device models. In addition to direct interaction with model developers and priority standing for bug fix and enhancement requests, CMC members receive 18-month advance model access before general release.

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Manny Sifakis Named Qualcomm Representative To Si2 OpenAccess Coalition

Emmanuel (Manny) Sifakis has been named Qualcomm’s representative to the Si2 OpenAccess Coalition.  Manny is currently senior staff engineering manager at Qualcomm, where he leads the CAD IP Quality and Design Management teams.

Manny has more than 15 years of experience in the VLSI field.  His roles have ranged from RTL to GDS delivery of custom and semi-custom designs to CAD flow and infrastructure design and development.

Si2 OpenAccess, the world’s most widely used, open-reference database for IC design, creates authentic interoperability between EDA companies and semiconductor designers and manufacturers.

Si2 Compact Model Coalition Offers Automatic Rule-Checking Software to Members and Developers

CMC Technical Advisor Geoffrey Coram of Analog Devices has developed and contributed device model rule-enforcing software to Si2. Known as Verilog-A Model Pythonic Rule Enforcer, or VAMPyRE, the software is a standalone compact model parser and checker written in Python.

VAMPyRE checks compact model implementation for a variety of problematic errors, such as hidden-state variables, bias-dependent switch branches, integer division, and unused parameters or variables. VAMPyRE also reviews the style of code, suggesting proper indentation and complaining about extra spaces or tabs. Resolving such errors during development can lead to dramatic time and cost savings during production.

“Commercial simulators generally just run Verilog-A models and are not usually concerned about unused parameters or poor coding style,” Coram said. “But sometimes an ‘unused’ parameter is an indication of an error, because that parameter should have been used in an equation.”  The tool is expected to bring benefits to multiple audiences: model developers want help during code development while EDA vendors would like a consistent coding style to help their optimization. Other CMC members want to verify compliance with the CMC’s Verilog-A Code Standards Policy, which was approved last fall.

CMC Chair Peter Lee agreed. “VAMPyRE is invaluable to enable the development of model code to meet the highest level of quality expected from the models standardized by the CMC. Due to these standard models being widely used in the semiconductor industry, issues with the code can potentially have a large impact to the semiconductor design business. VAMPyRE has already found errors in beta code under development of existing models before release, and we look forward to further improving and enhancing our current and next-generation models with VAMPyRE.”

To encourage widespread adoption, Si2 is offering VAMPyRE to CMC members and model developers under an open-source license.

Si2 Publishes White Paper on Expanding Use of AI/ML in Semiconductor Electronic Design

A new Silicon Integration Initiative white paper identifies a common data model as the most critical need to accelerate the use of artificial intelligence and machine learning in semiconductor electronic design automation.

The white paper, produced by a 20-member Si2 Special Interest Group, reports on findings of a global survey that identifies planned usage and structural gaps for AI and ML in EDA. It is available at  https://si2.org/product/collaborative-data-model/

Leigh Anne Clevenger, Si2 senior data scientist, said that the white paper identifies “a standard, common model for classifying and structuring machine learning and inference data as being crucial to accelerating the use of AI/ML in EDA. This data model would provide a foundation for addressing the data organization gap for chip developers, EDA tool developers, IP providers, and researchers. It would support design data and derived data for high-interest use cases.”

The survey also identifies a common reference flow, on-line AI/ML courses and organized training data as industry needs.

The white paper addresses:

  • Machine Learning and IC Design
  • Demand for Data
  • Structure of a Data Model
  • A Unified Data Model: Digital and Analog Examples
  • Definition and Characteristics of Derived Data for ML Applications
  • Need for IP Protection
  • Unique Requirements for Inferencing Models
  • Key Analysis Domains
  • Conclusions and Proposed Future Work

Member of the Si2 Special Interest Group include:

  • Advanced Micro Devices
  • Ansys
  • Cadence Design Systems
  • GLOBALFOUNDRIES
  • Hewlett Packard Enterprise
  • IBM
  • Intel Corp.
  • Intento Design
  • Keysight Technologies
  • Mentor, a Siemens Business
  • NC State University
  • PDF Solutions
  • Qualcomm
  • Samsung
  • Sandia National Laboratories
  • Silvaco
  • SK Hynix
  • Synopsys
  • Texas Instruments
  • Thrace Systems