New Si2 Working Group to Develop Unified Power Model for System-Level IC Design

AUSTIN—Silicon Integration Initiative, Inc. (Si2), a research and development joint venture focused on integrated circuit design tool interoperability standards, has launched a System Level Power working group to create the Si2 Unified Power Model (UPM), a standard which will strengthen power management in system-level IC design.

Jerry Frenkil, director of the OpenStandards Coalition, which incubates new Si2 standards, said development of the Si2 UPM is part of the industry’s ongoing effort to improve energy and power efficiency throughout the system-on-a-chip development flow, with a focus on system design.

“Energy efficiency is a growing and costly constraint in integrated circuit design,” Frenkil explained.  “There’s currently no standard, single model to represent power data at the system level across a range of process, voltage, and temperature (PVT) points.  Different, often inconsistent models are currently used in each of the three major stages of IC design:  system design, register transfer level (RTL) design, and implementation.  None of those models currently support voltage or temperature dependencies.  The Si2 UPM addresses those issues.”

When completed, the Si2 UPM will enable faster turnaround time for system-level power and thermal analyses, as well as reduce resources and costs incurred in power model generation, Frenkil said.  The approved specification, including the capability to supply power data to IEEE 1801/UPF power state models, will be contributed to the IEEE P2416 Working Group for ongoing maintenance and industry-wide standardization. IEEE P2416 supports the ability to develop accurate, efficient and interoperable power models for complex, integrated circuit designs.

Si2 members participating in the working group are ANSYS (NASDAQ: ANNS), Cadence Design Systems (NASDAQ: CDNS), IBM (NYSE: IBM), Intel (NASDAQ: INTC) and Entasys.

The Si2 UPM will benefit the three major constituencies to the IC design ecosystem:

  • For IP providers:
    • A system-level power data model companion for the IEEE 1801 (UPF) power state model
    • reduced time and resources for model and library generation and support.
  • For system and SoC architects
    • true system-level modeling that eliminates the need for gate-level netlists.
    • faster turn-around time for system-level power and thermal analyses
    • model consistency across abstractions
  • For EDA providers
    • New, non-cannibalistic product and solution opportunities

For information about the new Si2 UPM working group or other Si2 OpenStandards projects, contact Jerry Frenkil,

About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust law.

Have Ideas on Improving the IC Design Ecosystem?

Si2 is seeking industry input on an international effort to identify and address ways to streamline and improve the IC design ecosystem. The finished product will be a DAC 2018 white paper whose contents will present an industry consensus on specific ways the industry can manage the rising costs of more complex designs and smaller geometries.

We’re looking for comments and suggestions on specific design concerns to include in an industry survey whose results will provide data for the white paper. IC designers and engineers can submit survey questions for consideration at

If you have questions about the survey or white paper contact Ted Paone, [email protected].