CMC SPICE Models - Standardized Tested Accepted

CMC Models: Your Competitive Edge

The Compact Model Coalition (CMC) Standard Models are developed by the world’s leading SPICE model experts and are used by designers working at the world’s most advanced fabless semiconductor companies, integrated circuit foundries, and integration device manufacturers. These models are implemented by the industry’s top circuit simulation software developers. Standard models along with proven (tested) simulation results ensure that designers can have the assurance that their integrated circuit performance will exactly match the design’s specifications.

Standard Models for the Industry

The CMC program, paid for by CMC member dues, provides standardized Verilog-language device models to the public 18 months after they have been provided to the CMC membership. Beta Code, which provides the latest model enhancements and bug fixes intended testing by CMC is also available only to members that have also designated the specific model for funding support. Likewise, scripts required to run Quality Assurance (QA) tests of a supplier’s model implementations against the developer’s reference results, thereby validating simulator performance and accuracy, are also available only to CMC members.

Valuable Tools for Developers

To help with development of Verilog-A compact models, CMC has determined that their new Verilog-A Model Pythonic Rule Enforcer (VAMPyRE) should be made available to the public. VAMPyRE is a standalone compact model parser and checker written in Python. The software checks compact model implementations for a variety of problematic errors, such as hidden-state variables, bias-dependent switch branches, integer division, and unused parameters or variables. VAMPyRE also checks the style of code, suggesting proper indentation and complaining about extra spaces or tabs.