DAC 2016 Panel Discussion on DFM/DRC: The Insanity of DRC Rules and DFM and 10nm and Below

In just over 10 years, process nodes will have shrunk from 100nm in 2005 to 10nm in 2017. An upsurge in the complexity of advanced DRC decks makes it almost impossible to code rule decks using basic Pass/Fail DRC rules. The exponential increase in the design rule count and the number of operations required by complex DRC rules has made physical verification run times longer and increases debug times. A panel of four industry experts representing design, implementation, verification and manufacturing will describe their own personal experiences and best practices for developing DRC decks for 10nm processes.


Moderator: Jake Buurma, Senior Fellow, Si2
Mike Willet, Texas Instruments
Dave Doman, Director of CMOS Library Design, GLOBALFOUNDRIES
Raul Camposano, CEO, Sage Design Automation
Brian Veraa, Chip Architect and Integrator, Qualcomm

Presentation by: Raul Camposano, CEO, Sage Design Automation 

Presentation by: Mike Willet, Texas Instruments

Presentation by: Dave Doman, Director of CMOS Library Design, GLOBALFOUNDRIES 






Chip/Package/Board Co-Design and Co-Analysis: Moving from Spreadsheets to EDA

DAC 2016:


SoC development has become more than just silicon design. Today, successful SoC design requires consideration of the electrical, thermal, and mechanical interactions of the chip, the package and the board. This is especially true for silicon-in-package designs and 3D designs such as Hybrid Memory Cubes and High Bandwidth Memories. Co-design of the silicon and the package has become essential. This panel will present and discuss different challenges with and approaches to co-design and co-analysis.

What you will learn

  • Recent developments in 3D and co-design

  • Challenges and solutions in automating co-design and co-analysis

  • Applications most in need of co-design and co-analysis


  • Moderator, Jerry Frenkil, Director of OpenStandards, Si2

  • Humair Mandavia, Chief Strategy Officer, Zuken

  • Brandon Wang, Group Director, Cadence Design Systems

  • Teresa McLaurin, ARM