Si2 Expands Membership Opportunities for Advanced Concept Incubator
Silicon Integration Initiative has expanded membership opportunities for its OpenStandards Coalition, an internal, advanced-concept incubator that targets key technologies for standardization and fast-track industry approval.
OpenStandards participation is now available at no cost to members of Si2’s OpenAccess and Compact Model Coalitions. A standalone OpenStandards member option is also available
Jerry Frenkil, Si2 director of OpenStandards, said the new membership option is a response to current members looking for reduced barriers to collaborate on new design technologies. In addition, the IP policy is being streamlined for better alignment with member concerns. “With our standards incubator now accessible at no cost to our more than 60 members, we’ll see an increase in membership along with a greater diversity and higher quality of new projects,” said Frenkil.
A key feature of the OpenStandards incubator, and one that is unique to R&D joint ventures such as Si2, is that proposed standards are often prototyped by the members and Si2 staff prior to implementation. “When the standard is available for public release, it’s already been vetted and is significantly ‘bug-free.’ OpenStandards working group members can use the prototype code, their companies gaining a competitive advantage getting products to market,” Frenkil explained.
“When compared to the publish-and-prototype approach used by conventional industry standards groups, which are legally precluded from performing pre-standards and joint development, OpenStandards is both an incubator and an accelerator for standards adoption,” he said.
Current Si2 OpenStandards members are: AYSYS Inc., Cadence Design Systems, Entasys Design Inc., IBM Corp, Intel Corp., Qualcomm Technologies Inc., and Zuken Inc. Current OpenStandards projects include:
Unified Power Model (UPM) Working Group develops, specifies, prototypes, and standardizes advanced solutions for system level-power modeling. This work is aimed at reducing costs, resources, and risks associated with creating, supporting, and using power models.
Chip Package Co-Design Working Group develops, specifies, and standardizes enhancements to package description formats for 2.5D and 3D design to facilitate standardized data exchange among design, packaging, foundry, and assembly groups.
Open Pattern Advanced Layout Working Group specifies a concise language for rapidly searching IC layouts for yield detracting 2D patterns in an Si2 Open Access database. OPAL is aimed at reducing the increasing cost and effort in describing complex patterns in advanced processes.