The LLM Benchmarking Coalition will expedite the development of high-quality LLMs for semiconductor design by creating relevant and comprehensive evaluation datasets and metrics for semiconductor design problems.
The Coalition’s members will build on NVIDIA’s open-source Comprehensive Verilog Design Problems (CVDP) benchmark that provides an LLM evaluation framework for LLMs used for Register-transfer level (RTL) design and verification problems. The goals of the Coalition are to:
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