Si2 Compact Model Coalition Releases BSIM-CMG SPICE Model for Advanced IC Designs

CMC Members Benefit from 18-Month Early Access to New Standard Model

AUSTIN, Texas — The Si2 Compact Model Coalition has released the latest version of BSIM-CMG FinFET, a standard compact SPICE model developed by researchers at the University of California, Berkeley, in conjunction with 20 partners from many of the industry’s leading semiconductor companies.

CMC is a collaborative industry group that standardizes SPICE (Simulation Program with Integration Circuit Emphasis) device models.

John Ellis, Si2 president and CEO, said FinFET is the transistor design that powers the industry along Moore’s Law to advanced leading-edge integrated circuits, including the latest 7nm chips used in every new smartphone, tablet, server, and personal computer. “The industry-standard SPICE model for FinFET is the 3D multi-gate transistor, a critical part of the ecosystem. Its sophistication required a cross-industry team to bring this model to fruition,” Ellis said.

“FinFET” refers to a visual description of a multi-gate, non-planar transistor. In IC design, field-effect-transistor gates wrap around the three sides of a vertical, fin-like channel, creating conducting channels on all sides of the structure. FinFET was named by Dr. Chenming Hu, a National Medal of Technology and Innovation recipient and professor emeritus in the Electronic Engineering and Computer Science Department at UC Berkeley.

“The model updates in the new release (111.0.0) are important refinements and fixes,” stated CMC BSIM-CMG working group chair, Richard Williams. “This new release will benefit all BSIM-CMG users in its myriad applications.” Through the CMC—­and working under Si2’s anti-trust umbrella as a collaborative R&D joint venture—university researchers, simulation software suppliers, fabless, foundry and integrated device manufacturers team up to produce a variety of industry-standard models. CMC members have immediate access to new standards, while new standards are released to the public 18 months after initial release.

Dr. Harshit Agarwal, a post-doctoral developer at UC Berkeley states, “CMC provides a tie to the industry that keeps us in close touch with the customer’s needs. Without CMC there’s no shared funding to support our model standardization, and the data, testing, and feedback on model performance would have to be sought after on a company-by-company basis. Together we are all much more intelligent and customers can cooperatively prioritize their requested features and bug fixes. Beyond this, the quality assurance program provided by CMC ensures our model, and the simulator provider’s implementations, perform at their absolute best for the designers.”

Dr. Peter Lee, CMC chair, agreed and added, “It has been two-and-a-half years since the last major BSIM-CMG update, which is equivalent to a semiconductor generation or two. This new version implements 25 enhancements and 13 bug fixes which improve accuracy, convergence, and performance when compared to the previous version. These changes can have important implications in shortening design time and ensuring first silicon success for a wide variety of products.”

Enhancements include improvements to the thermal noise model and the introduction of gate current scaling factors. Bug fixes include corrected parameter range, and use of macros instead “ifdef’s”, making the code even more robust.


About Si2

Founded in 1988, Si2 is a leading research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.

Free Webinar for Si2 Members: Introduction to XML

Many Si2 OpenStandards are based on XML, the eXtensible Markup Language. XML files have a consistent syntax and, combined with the domain specific vocabulary defined in the Open Process Specification (OPS) schemas, succinctly capture the data used to model the IC fabrication process to the design tools.

The OPS XML database contains the constraints, layers, stacks, devices and rules that represent the fabrication process in a vendor-neutral format. This single source for the data is used to generate process design kits.

About the Course
This introductory course focuses on the XML file syntax that will help you create well-formed XML files. Through lecture, quizzes and labs, you will examine the syntax of XML elements and learn how to create, modify or read and understand an OPS XML file. We will explore the file format, elements and attributes, namespaces and connecting to schemas.

Prerequisites: A willingness to learn XML and an interest in OPS.

Course Outline

  1.   Exploring XML
    — XML editors
    — What is XML and why do we use it?
    — How do you use OPS XML?
    — What is a valid XML file?
  1.   XML File Format
    — XML prologue and comments
    — XML element declaration
    — Attributes
    — Sub-elements and content value
  1.   Namespaces and Schemas

The example used in the class is a single OPS XML hierarchy that will be used for future courses in this series.  A recording will be available on the Si2 Community web site.

Who Should Attend
Si2 member company employees who work with, create, edit or read XML data files are invited to attend this free webinar. 

Ted Paone
Si2 Interoperability Standards Architect

Ted Paone


Future Courses for Si2 Members

Si2 will offer additional XML classes  Announcements will be made by email and on our web site,

  • OpenStandard Schemas
  • XML editors
  • XML utilities
  • XML Python Parser
  • Writing ASCII technology files from OPS XML
  • Inputting comma separated value (CSV) files
  • Xinclude – Building a process database