The Si2 Compact Model Coalition (CMC) is making its Verilog-A model coding guidelines available to the public for the first time. The Verilog-A description of each compact model defines the standard for that model. For implementation of the compact model to be considered compliant with the standard, it must give the same outputs (terminal currents, noises, and operating-point information) as the Verilog-A code of the compact model when provided with the same inputs, parameter settings, and applied biases.
These coding guidelines describe how to use Verilog-A (syntax, required components, naming conventions, etc.) to create compact model descriptions. They help enable efficient model integration into EDA circuit simulators and support Quality Assurance (QA) testing of compact models before their release.
The coding guidelines are described in the policy document “Verilog-A Code Standards,” which is available for download from si2.org under “Public Standards and Solutions > CMC Standard Models.” The appendix includes a set of CMC macro examples demonstrating the use of the standards.
For more information on the Verilog-A Model Code, contact Geoffrey Coram, Ge************@an****.com
