SUNNYVALE, California — December 23, 2025 — The Silicon Integration Initiative (Si2) hosted its inaugural LLM Benchmarking Coalition (LBC) Strategic Workshop on December 9, 2025, at Synopsys headquarters in Sunnyvale, CA. The LBC is a collaborative industry initiative and standards body dedicated to advancing AI for silicon design and verification, accelerating the development of high-quality large language models (LLMs) for semiconductor design challenges.
The workshop brought together over 50 technical leaders from 17 industry and EDA companies and 9 universities/research institutions, all with deep expertise in LLMs, benchmarking, leaderboards, and semiconductor design.
Learn more and view the current list of LBC members
Highlights from Invited Talks
- Igor Markov, Distinguished Architect, Synopsys — “AI Landscape in EDA and Agentic Automation for IC Design”
Explored AI-driven optimizations and reimagined EDA workflows with AI agents, emphasizing rigorous benchmarking for scientific validity. - Adrian Otto, Technical Director, Office of the CTO, Google — “AlphaEvolve for the Next Generation of Algorithm Discovery”
Showcased how AlphaEvolve architecture optimizes processes once considered state-of-the-art, including data center scheduling and Gemini LLMs. - Ritik Vijayvergiya, Algorithmic SuperIntelligence Labs — “Motivation and Future Directions for OpenEvolve”
Presented research on teaching LLMs to discover algorithms through OpenEvolve and discussed its role in expanding LBC benchmarking goals.
Key Workshop Topics
- Interpretation of RTL Benchmarking Results on CVDP
- Industry and academic benchmark results
- Expanding CVDP for VHDL design and synthesis
- Recommendations for strengthening benchmarks
- Tools for automating metrics and interpretation
- Working Group Ideation Sessions
- Improving leaderboard quality and metrics
- Expanding benchmarks beyond RTL
- Enhancing interoperability with agentic technologies
- Setting 2026 goals for broader industry impact
Join the Si2 LLM Benchmarking Coalition or sign up for future events
About the LLM Benchmarking Coalition
Modern chips are increasingly complex, and design teams face growing pressure to deliver reliable silicon on tight schedules. LLMs offer promising assistance—from drafting RTL to explaining verification failures—but capabilities vary widely. The LBC provides transparent benchmarking, leaderboards, and metrics to accelerate innovation and ensure fair comparisons across approaches, building upon the RTL design and verification benchmarks provided in the open-source Comprehensive Verilog Design Problems.
About Si2
Si2 is a global, not-for-profit membership organization with approximately 70 corporate members collaborating on trusted standards and shared solutions that reduce development costs and increase design productivity for semiconductor foundries, fabless design companies, and EDA software providers.