President and CEO
More About John
John first joined Silicon Integration Initiative (Si2) as Vice President of Engineering in 2013, and brings more than 30 years of experience leading diverse research and development programs to his current role as President and CEO. After graduate school, John focused on R&D projects in precision guidance, airborne and space-borne radar imaging, Internet and IC security, MEMS and semiconductor manufacturing at Sandia National Labs.
In 2000, his career took him to the SEMI-SEMATECH research consortium, which merged with SEMI, a global trade association for the semiconductor industry. As VP of Technology, he was responsible for supporting industry standards as well as coordination of initiatives such as fab equipment remote diagnostics and control and 450mm wafer economic analysis. John received his Master of Science in mechanical engineering from the University of Texas at Austin.
Chief Strategy Officer
More About Vic
As a former Si2 BoD member, Vic was involved in developing a new methodology for setting Si2’s long-term strategy. In this newly created role, he is diving deeper into reshaping of the organization for its future sustainability and growth. Before Si2, Vic steered the business, technology, go-to-market in multiple verticals, product strategy and strategic acquisitions for the Ansys Semi BU.
Vic earned an MSEE in Solid State Electronics from the University of Cincinnati, which honored him with the “Distinguished Alumnus Award” in 2007. He received his Bachelor of Technology, Electrical Engineering, IIT Bombay.
TITAN Interim Chair, Senior Technical Staff Member
More About Kerim
Kerim is a member of the IBM Academy of Technology, a Senior Technical Staff Member in the IBM Systems Group, and an IBM Master Inventor. His current role is lead architect of EDA analytics and static timing analysis software tools used to design and verify the world’s fastest microprocessors. Kerim has received multiple prestigious Research Division awards for publications in computer science and mathematics, an ACM/IEEE Technical Impact Award in Electronic Design Automation, as well as a best-paper award at the Design Automation Conference, and was recognized for co-authoring a top-10 most cited paper in the 50 year history of DAC. Kerim has also received both the IBM Corporate and Outstanding Technical Achievement Awards for contributions to the field of statistical timing analysis.
Kerim is an inventor on at least 80 issued patents worldwide and approximately a dozen more pending. He is a member of the executive board for the Rhinebeck Science Foundation, and volunteers extensively in his local community. Before joining IBM, Kerim received his undergraduate and graduate degrees in Computer and Systems Engineering from Rensselaer Polytechnic Institute, where he graduated with Summa Cum Laude honors.
Vice President, Design Enablement
Senior Director of Strategic CAD Capabilities
More About Ray
Ray joined Intel as Design Automation Manager in 2000, and has since defined tools, flows, and methodologies for ASIC and SoC implementation in WCCG, ICG, and UMG. He also played a key role in creating and implementing the Maya SoC flow and deploying Magma APR at Intel and has published internal papers on SoC methodologies and implementation flows.
Outside of Intel, Ray has served as chair of various groups within DAC, ESDA, IEEE, and Si2. Ray spent ten years as the ASIC designer and methodologist at Xerox Corporate Research and Technology and holds two US and one European patent for Data Decompression techniques. Ray earned a BSEE from the University of California, Los Angeles, and an MBA from an executive program at Arizona State University.
Fellow and Chief Technologist
More About Norman
Norman co-founded Apache Design Solutions in February 2001 and currently leads AI/ML and security initiatives at Ansys. Prior to Apache, he led a research group researching the power/signal/thermal integrity of chipsets based on VLIW architecture at HP Labs. He now serves on committees within EDPS, ESDA-EDA and the SI2 AI/ML SIG, and is an IEEE Senior Member.
Norman holds 19 patents and has co-authored over 50 IEEE technical papers as well as a popular book on “Interconnect Analysis and Synthesis” by Wiley-Interscience at 2000. Norman received his Ph.D. in electrical engineering and computer sciences from the University of California, Berkeley.
More About João
João has 30 years of EDA experience and is the author/co-author of numerous papers and patents on static and statistical timing analysis, IR analysis, security side-channel, event simulation, formal systems, and fault-tolerant distributed computing.
Prior to Ansys, João was CTO and co-founder of CLK Design Automation and was previously one of the lead architects in the verification and simulation group at Synopsys. He holds a doctorate and bachelor’s degree in engineering from the University of Newcastle.
What You Will Learn
Senior Director of Technology
More About Rajeev
Rajeev leads machine learning R&D for SoC design at Qualcomm. He has performed research in CAD and IC design at Siemens, IMEC, UC Berkeley, and UCLA, where he is currently Professor Emeritus.
In 1999, Rajeev was elected IEEE Fellow for his contributions to computer-aided design tools for signal processing circuits. Rajeev received his Bachelor of Technology in electrical engineering from the Indian Institute of Technology Delhi in 1978 and Ph.D. in electrical engineering from KU Leuven in 1985.
Senior Director of Engineering
More About Mamta
Mamta joined Qualcomm in 2010 and has led worldwide engineering teams responsible for RTL2GDS design flows for Qualcomm SoCs in cutting-edge advance process nodes. She now applies her 25 years of experience in the semiconductor industry to lead the global CAD digital implementation platform at Qualcomm.
Before joining Qualcomm, Mamta served as IP Design Manager, Technology Access Manager and Director of EDA at PMC-Sierra, Inc. She received her education in electrical engineering from the Indian Institute of Technology.
What You Will Learn
Leigh Anne Clevenger
Director of OpenStandards
More About Leigh Anne
Since joining Si2 in 2018, Leigh Anne has been the lead developer of the Si2 prototype power calculator, demonstrating the UPM/IEEE-2416 standard. She also drives the UPM working group toward its goals of developing and adopting the standard. In addition, she spearheads the Si2 effort to identify and solve industry needs in applying artificial intelligence and machine learning to electronic design automation tools.
Leigh Anne earned her doctorate at Pace University. She brings to Si2 extensive experience in semiconductor design automation at IBM and semiconductor processing technology at GLOBALFOUNDRIES.