Ray joined Intel as Design Automation Manager in 2000, and has since defined tools, flows, and methodologies for ASIC and SoC implementation in WCCG, ICG, and UMG. He also played a key role in creating and implementing the Maya SoC flow and deploying Magma APR at Intel and has published internal papers on SoC methodologies and implementation flows.
Outside of Intel, Ray has served as chair of various groups within DAC, ESDA, IEEE, and Si2. Ray spent ten years as the ASIC designer and methodologist at Xerox Corporate Research and Technology and holds two US and one European patent for Data Decompression techniques. Ray earned a BSEE from the University of California, Los Angeles, and an MBA from an executive program at Arizona State University.